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This issue becomes much more challenging as the relative change in capacitance is small when compared to the capacitance being measured.
These functions are described as the tElement. These components are automatically tuned for each element in order to achieve the conversion gain and conversion count defined within the sensor.
The conversion count, firstly, describes the conversion time. This number is the number of charge transfers that occur for a non-touch measurement.
Secondly, the conversion time is directly proportional to the sensitivity of the system. As the conversion count is increased the relative change in the conversion result, due to touch increase in capacitance , will increase. The conversion gain is always less than or equal to the conversion count. The difference between the gain and the count is proportional to the sensitivity of the system and is directly related to the offset compensation. When the conversion gain is equal to the conversion count, no offset compensation is applied and the sensitivity is solely related to the gain.
As the conversion gain decreases the amount of offset compensation is increased. By increasing the offset compensation, although the absolute change in capacitance is the same, the relative change in capacitance increases. The internal reference capacitor is used to generate the change in capacitance: moving from setting 3 5. Table 2 shows the Conversion Count and Gain parameters already discussed and a third parameter, bCsDischarge, which can be used to extend the sensitivity over a greater range of capacitance by setting the value to 0 or 0V.
The default setting is 1, or 0. This is made possible with an integrated timer and finite state machine. The primary purpose for the timer is to periodically trigger conversion events. The interrupt vector is available and therefor the timer is available to the system as a general purpose timer. The finite state machine provides several functions to lessen the burden upon the CPU. As mentioned, in conjunction with the timer, the FSM can automate the measurement process so that no CPU interaction is needed until a specified interrupt event occurs.
The maximum count detection logic, defined as tSensor. This is particularly helpful to help prevent shorts from negatively impacting the entire system, and provides a mechanism to quickly identify faulty keys. This mode is typically used in a multi-cycle sensor implementation. Figure 9, shows a classic example of a key keypad divided into 4 4-element cycles. The CPU loads the information for each cycle, performs the measurement, saves the results of the measurement, and then proceeds to the next cycle.
During the measurement phase the CPU can enter a low power mode or perform other activities. In addition to the maximum count error detection logic, detection logic is also added.
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